Design of a RF Transmitter for RFID Tags in a New Technology with Ultra Thin Silicon Substrates

A test-chip for exploring the possibility of implementing RFID on a new 0.5-μm gate-array technology, with 20-μm Si substrates, is presented. It comprises of 4 transmitter circuits based on two ring oscillators and two cross-coupled oscillators. The design strategy adopted ensures simplicity in circuit design and a wide tuning range to account for the uncertainty implicated by the new technology. One cross-coupled VCO operates at 2.45 GHz in the ISM band with a 35% tuning ratio. It features a 4-band frequency tuning characteristic utilizing a binary-weighted switched capacitor bank and MOS varactors. Power consumption of the VCO core is 23 mW with a tail current of 5 mA.